Abhijeet Chachad graduated with a Masters in EE from the University of Texas at Dallas in 1997 and has been at Texas Instruments for 28 years where he is currently a Senior Member of Technical Staff. He is a Senior Systems Architect in the Automotive Processors organization, where he is responsible for helping customers define their ADAS and Infotainment systems, and for architecting the next generation of TI SOCs. He was part of TI's DSP/SOC design group for 25 years, where he help multiple leadership roles in the areas of architecture, RTL design, and verification. He has numerous innovations and over 50 patents in the areas of Cache & DSP architectures, low-power design, safety, clocking and multi-core/heterogeneous architectures to name a few.
Keynote
Tuesday, December 09
09:20 am - 09:45 am
Live in Dearborn, Michigan
Less Details
Automotive trends toward Software-Defined Vehicles and Zonal Architectures are driving the need for a unified and scalable System-on-Chip architecture. However, enabling SoC-level scalability presents significant challenges, from redefining performance metrics beyond DMIPS, TOPS, and GFLOPS to managing thermal constraints as compute density increases. Join us as we explore the complexities of domain and cross-domain fusion, the need for chiplet architecture standardization beyond UCIe, and strategies for overcoming memory bottlenecks.
In this session, you will: